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BCD, CMOS, FinFET, SOI, GaN & SiC Technologies Explained

Introduction to Semiconductor Semiconductors have a small energy gap between the conduction and valance bands, and their conductivity is between insulators and conductors. At absolute zero temperature, semiconductor materials are pure insulators and gradually increase with temperature. Temperature and doping are the two mechanisms to manage the conductivity of semiconductors. Doping ...

Creonic’s DVB-S2 and DVB-S2X IP Cores Now Support the New DVB-NIP Standard

Creonic’s DVB-S2 and DVB-S2X IP cores now include support for the new DVB-NIP standard on physical layer — an important step toward seamless integration of satellite and IP-based network technologies.   The DVB-NIP standard is designed to facilitate the native transport of IP over satellite networks, extending the capabilities of DVB-S2X by streamlining packet-based data delivery.  With ...

INTEGRA TECHNOLOGIES EXPANDS SILICON PHOTONICS CAPABILITIES

Silicon Valley, CA (Feb 9, 2021) - Integra Technologies, a world leader in semiconductor packaging, assembly, test, characterization and related services, today announced the successful implementation of a high accuracy fiber array waveguide attachment system focused on the Silicon Photonics market. This latest set of tools is based on the double-sided HexNano ...

Creonic

Germany

Creonic is the leader in ready-for-use IP cores, offering a rich product portfolio for wired, wireless, fiber and free-space optical communications.

Comparing Au, Pt, Ag and Cu Wire Bonding

With the creeping rise in the price of gold, many microelectronics manufacturing companies have been looking for alternatives to reduce the cost of ball bonding. Recently, the trend has been to look into the use copper wire. However, there are many drawbacks to using copper wire, including the short shelf ...

Creonic Adds oFEC Codec IP Core to Portfolio, Expanding High-Speed Networking Solutions for ASIC and FPGA

Kaiserslautern, Germany – May 21, 2025 – Creonic GmbH, a leading provider of ready-to-use IP cores for ASIC and FPGA applications, announces the release of its new oFEC (Open Forward Error Correction) codec IP core. The solution supports next-generation optical and high-speed communication systems and is now available in both ...

IC Failure Analysis Techniques: A Complete Guide

When an integrated circuit fails, identifying the damaged component is only part of the challenge. Engineers must determine where the failure occurred, what physical or electrical mechanism caused it, and ultimately why it happened. This requires a combination of specialized IC failure analysis techniques. Some techniques detect electrical abnormalities without physically altering ...

NVM Express IP for Enterprise SSDs - Overview and Implementation

The NVM Express (NVMe) specification has been introduced in 2011. Five years later, it is definitely adopted as the new standard storage interface for Solid-State Drives (SSD). Even if SAS and SATA SSDs are still dominating the market (in unit shipment), the PCIe SSD market share is growing fast and ...

Understanding Wafer Cost

The factors affecting silicon wafer cost are numerous. From the resistivity required for different applications to the physical size of the wafers, and not least the quality grades that separate the pristine from the less perfect; each aspect intricately influences the cost.     As we embark on this explanation, we'll unwrap the ...

China Imposes Export Restrictions on Key Minerals to the United States

The Chinese Ministry of Commerce today announced immediate export restrictions on gallium, germanium, antimony, and super-hard materials to the United States. This action cites national security concerns and represents a significant escalation of trade tensions between the two countries. The restrictions follow recent U.S. actions to curb exports of semiconductor-related ...