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Creonic Releases DVB-S2X Demodulator Version 6.0 with Increased Bitwidth and Annex M Support

Kaiserslautern, Germany – July 31, 2025 – Creonic GmbH, the leading provider of cutting-edge communications IP cores, announces the release of Version 6.0 of its DVB-S2X Demodulator IP core. This major update introduces powerful enhancements that expand the configurability and technical performance of one of Creonic’s most mature and widely ...

Transmission Electron Microscopy (TEM) for Semiconductor Failure Analysis

Transmission Electron Microscopy (TEM) is one of the highest-resolution physical-analysis techniques used in semiconductor failure analysis. It allows failure analysts to examine extremely small structural and material anomalies that may be impossible to characterize using optical microscopy or conventional SEM alone. TEM works by transmitting a high-energy electron beam through an ...

Creonic

Germany

Creonic is the leader in ready-for-use IP cores, offering a rich product portfolio for wired, wireless, fiber and free-space optical communications.

China Imposes Export Restrictions on Key Minerals to the United States

The Chinese Ministry of Commerce today announced immediate export restrictions on gallium, germanium, antimony, and super-hard materials to the United States. This action cites national security concerns and represents a significant escalation of trade tensions between the two countries. The restrictions follow recent U.S. actions to curb exports of semiconductor-related ...

SEM Analysis for Semiconductor Failure Analysis

Scanning Electron Microscopy (SEM) is one of the most important imaging techniques used in semiconductor failure analysis. While optical microscopes remain extremely useful for initial inspection, many semiconductor defects are simply too small to characterize adequately with visible-light microscopy. SEM uses a focused beam of electrons rather than light, allowing engineers ...

Electrical Failure Analysis (EFA) of Integrated Circuits

When an integrated circuit fails, one of the first questions is: How is the device failing electrically?   A chip may exhibit excessive leakage current, a short circuit, an open connection, abnormal supply current, a parametric shift or a complete functional failure. Before engineers physically cut into the device, they usually want to ...

IC Short Circuit Failure Analysis | Locate Semiconductor Shorts

IC short circuit failure analysis is the process of determining where an unintended electrical connection exists inside a semiconductor device, package or interconnect structure and identifying the physical defect that created the short. A short circuit may initially appear only as excessive supply current, unexpectedly low resistance between two nodes, abnormal ...

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Package Failure Analysis Services | IC Package FA Lab

Package failure analysis is the systematic investigation of defects and failures originating within semiconductor packaging, interconnects, solder connections, die attach, bond wires, redistribution layers and other structures that connect the semiconductor die to the outside system. A semiconductor device may fail electrical testing even though the silicon itself is functioning correctly. ...

OBIRCH for Semiconductor Failure Analysis: Resistive Fault Localization

OBIRCH (Optical Beam Induced Resistance Change) is a laser-based fault-localization technique used in semiconductor failure analysis to identify electrically abnormal regions such as resistive shorts, leakage paths, defective vias and interconnect problems. The technique works by scanning a focused laser across an electrically biased semiconductor device. Local laser heating changes the ...