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Physical Failure Analysis (PFA) of Semiconductor Devices

Once an electrical failure has been localized inside an integrated circuit, the next challenge is determining what physically went wrong.  Was a metal interconnect broken?  Did a via fail?  Is there contamination between two structures? Has a dielectric layer broken down? Is a transistor structure abnormal? Or did the failure originate in the ...

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SEM Analysis for Semiconductor Failure Analysis

Scanning Electron Microscopy (SEM) is one of the most important imaging techniques used in semiconductor failure analysis. While optical microscopes remain extremely useful for initial inspection, many semiconductor defects are simply too small to characterize adequately with visible-light microscopy. SEM uses a focused beam of electrons rather than light, allowing engineers ...

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Focused Ion Beam (FIB): Semiconductor Failure Analysis

Focused Ion Beam (FIB) technology is one of the most versatile tools used in semiconductor failure analysis and microelectronics characterization. A FIB system directs a tightly focused beam of ions onto a sample. By controlling the beam current, energy, position and scanning pattern, engineers can remove material from extremely specific locations, ...

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ficonTEC and PHIX partner to enable high-volume manufacturing of multi-chip photonic modules

PHIX B.V. of Enschede, The Netherlands, is a Dutch packaging foundry that assembles their customers’ photonic integrated circuits into complete modules. As these modules evolve from initial prototypes into mature products, the manufacturing volumes become much larger and a higher level of automation is required. This aspect of photonic device ...

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Electrical Failure Analysis (EFA) of Integrated Circuits

When an integrated circuit fails, one of the first questions is: How is the device failing electrically?   A chip may exhibit excessive leakage current, a short circuit, an open connection, abnormal supply current, a parametric shift or a complete functional failure. Before engineers physically cut into the device, they usually want to ...

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Semiconductor Failure Analysis Labs by Equipment & Technique

Finding the right semiconductor failure analysis lab often depends less on the laboratory's name and more on whether it has the equipment and technical expertise required for your specific failure. A package delamination problem may require Scanning Acoustic Microscopy. A suspected interconnect defect may require FIB cross-sectioning and SEM inspection. Leakage ...

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Sarcina Technology launches AI platform To enable cost-effective customizable packaging solutions for AI applications

Palo Alto, CA - 25 March 2025. Sarcina Technology, a global semiconductor packaging specialist, is excited to announce the launch of its innovative AI platform to enable advanced AI packaging solutions that can be tailored to meet specific customer requirements. Leveraging ASE’s FOCoS-CL (Fan-Out Chip-on-Substrate-Chip Last) assembly technology, this platform ...

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The 6 Must-Do’s for Semiconductor Fabless Start-ups

Getting funding for a semiconductor startup is not getting easier. According to CBIngishts, there have been fewer than 20 Angel/Seed and Series A deals in the USA in each year since 2009.   So where is all the funding channeled to? In 2013, close to a quarter of all VC funding was ...

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Qmode project with QuiX

The Qmode project is funded with an MIT-R&D collaboration project grant from the Provincie Overijssel, dedicated to stimulate the innovation and development of products, processes and services of local SMEs working in the Dutch Top Sectors. The collaboration established in Qmode will help QuiX secure a leading position in the ...

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IC Short Circuit Failure Analysis | Locate Semiconductor Shorts

IC short circuit failure analysis is the process of determining where an unintended electrical connection exists inside a semiconductor device, package or interconnect structure and identifying the physical defect that created the short. A short circuit may initially appear only as excessive supply current, unexpectedly low resistance between two nodes, abnormal ...

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