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Scanning Acoustic Microscopy (SAM) for Semiconductor Failure Analysis

Scanning Acoustic Microscopy (SAM) is a non-destructive imaging technique widely used in semiconductor failure analysis to inspect structures and interfaces hidden inside IC packages. Unlike optical microscopy, which relies on visible light, or X-ray inspection, which relies primarily on differences in material density and X-ray absorption, SAM uses high-frequency acoustic waves. This ...

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Creonic

Germany

Creonic is the leader in ready-for-use IP cores, offering a rich product portfolio for wired, wireless, fiber and free-space optical communications.

Services

IP Customization, Low power, small footprint Design Methodology, Integration Services on Customer FPGA Boards, System Design, Consulting

IP Cores

IEEE 802 Data Center and Wireless FEC , OpenZR+/ Open ROADM oFEC 800GbE, SDA, ITU High-Speed Optical Communication IP Cores, Full ETSI DVB-S2X Wideband Transmitter and Receiver, AWGN Channel, 3GPP Mobile Communications

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Gallium Arsenide (GaAs) Overview

Gallium arsenide (GaAs) technology is a type of semiconductor material used in the manufacturing of various electronic devices. It is known for its high electron mobility, which allows it to operate at higher speeds and with lower power consumption compared to other semiconductor materials such as silicon. GaAs technology is ...

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The 6 Must-Do’s for Semiconductor Fabless Start-ups

Getting funding for a semiconductor startup is not getting easier. According to CBIngishts, there have been fewer than 20 Angel/Seed and Series A deals in the USA in each year since 2009.   So where is all the funding channeled to? In 2013, close to a quarter of all VC funding was ...

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Why Dr. Morris Chang is not My Hero. A tribute to Failure Analysis Engineers

  Dr. Morris Chang is not my hero. He might be the most important person in the semiconductor industry in our lifetime, but he is not my hero. I have nothing against him. I’ve never met him and probably will never will. Instead, I meet my heroes usually after tape-out, when ...

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OBIRCH for Semiconductor Failure Analysis: Resistive Fault Localization

OBIRCH (Optical Beam Induced Resistance Change) is a laser-based fault-localization technique used in semiconductor failure analysis to identify electrically abnormal regions such as resistive shorts, leakage paths, defective vias and interconnect problems. The technique works by scanning a focused laser across an electrically biased semiconductor device. Local laser heating changes the ...

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RoodMicrotec

Germany

RoodMicrotec provides SCM, Test, Qualification, Failure Analysis and Engineering services to automotive, aerospace, industrial, consumer, medical markets and fabless companies.

Services

Supply Chain Management Services – Turnkey Solutions, Engineering services, test program development, Qualification & Reliability investigations, Optomechanical qualifications, Failure & Technological analysis, Device testing, device programming, end-of-line services

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China Imposes Export Restrictions on Key Minerals to the United States

The Chinese Ministry of Commerce today announced immediate export restrictions on gallium, germanium, antimony, and super-hard materials to the United States. This action cites national security concerns and represents a significant escalation of trade tensions between the two countries. The restrictions follow recent U.S. actions to curb exports of semiconductor-related ...

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ASIC Design for Silicon Photonics

Imagine a world where data moves at the speed of light—literally. Silicon photonics makes this possible, merging optics with the familiar silicon used in traditional electronics.   This advanced technology, originating from the 1980s, stands today as a pivotal innovation in microelectronics. It offers faster data transfer rates and lower power consumption ...

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Physical Failure Analysis (PFA) of Semiconductor Devices

Once an electrical failure has been localized inside an integrated circuit, the next challenge is determining what physically went wrong.  Was a metal interconnect broken?  Did a via fail?  Is there contamination between two structures? Has a dielectric layer broken down? Is a transistor structure abnormal? Or did the failure originate in the ...

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