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Semiconductor Failure Analysis: The Complete Guide to IC Failure Analysis

Semiconductor devices can fail for many reasons: manufacturing defects, electrical overstress, electrostatic discharge, contamination, packaging problems, excessive temperature, mechanical stress, aging or defects introduced during assembly.   Finding the actual cause of an IC failure, however, is rarely as simple as looking at the damaged device.   Semiconductor failure analysis (FA) is the systematic ...

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INTEGRA TECHNOLOGIES EXPANDS SILICON PHOTONICS CAPABILITIES

Silicon Valley, CA (Feb 9, 2021) - Integra Technologies, a world leader in semiconductor packaging, assembly, test, characterization and related services, today announced the successful implementation of a high accuracy fiber array waveguide attachment system focused on the Silicon Photonics market. This latest set of tools is based on the double-sided HexNano ...

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Creonic’s DVB-S2 and DVB-S2X IP Cores Now Support the New DVB-NIP Standard

Creonic’s DVB-S2 and DVB-S2X IP cores now include support for the new DVB-NIP standard on physical layer — an important step toward seamless integration of satellite and IP-based network technologies.   The DVB-NIP standard is designed to facilitate the native transport of IP over satellite networks, extending the capabilities of DVB-S2X by streamlining packet-based data delivery.  With ...

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China Imposes Export Restrictions on Key Minerals to the United States

The Chinese Ministry of Commerce today announced immediate export restrictions on gallium, germanium, antimony, and super-hard materials to the United States. This action cites national security concerns and represents a significant escalation of trade tensions between the two countries. The restrictions follow recent U.S. actions to curb exports of semiconductor-related ...

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Creonic Adds oFEC Codec IP Core to Portfolio, Expanding High-Speed Networking Solutions for ASIC and FPGA

Kaiserslautern, Germany – May 21, 2025 – Creonic GmbH, a leading provider of ready-to-use IP cores for ASIC and FPGA applications, announces the release of its new oFEC (Open Forward Error Correction) codec IP core. The solution supports next-generation optical and high-speed communication systems and is now available in both ...

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Qmode project with QuiX

The Qmode project is funded with an MIT-R&D collaboration project grant from the Provincie Overijssel, dedicated to stimulate the innovation and development of products, processes and services of local SMEs working in the Dutch Top Sectors. The collaboration established in Qmode will help QuiX secure a leading position in the ...

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Analogue Insight

UK

Seamlessly Bridging the Analogue and Digital Worlds for Tomorrow's Chiplet Solutions.

Services

Partnership Programs, Standard Chiplet Design, Custom SoC and IP Design & Licensing, Comprehensive Design Services, Consulting

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ASIC Design for Silicon Photonics

Imagine a world where data moves at the speed of light—literally. Silicon photonics makes this possible, merging optics with the familiar silicon used in traditional electronics.   This advanced technology, originating from the 1980s, stands today as a pivotal innovation in microelectronics. It offers faster data transfer rates and lower power consumption ...

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OBIRCH for Semiconductor Failure Analysis: Resistive Fault Localization

OBIRCH (Optical Beam Induced Resistance Change) is a laser-based fault-localization technique used in semiconductor failure analysis to identify electrically abnormal regions such as resistive shorts, leakage paths, defective vias and interconnect problems. The technique works by scanning a focused laser across an electrically biased semiconductor device. Local laser heating changes the ...

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BCD, CMOS, FinFET, SOI, GaN & SiC Technologies Explained

Introduction to Semiconductor Semiconductors have a small energy gap between the conduction and valance bands, and their conductivity is between insulators and conductors. At absolute zero temperature, semiconductor materials are pure insulators and gradually increase with temperature. Temperature and doping are the two mechanisms to manage the conductivity of semiconductors. Doping ...

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