Find companies providing IC FIB Services

SEM Analysis for Semiconductor Failure Analysis

Scanning Electron Microscopy (SEM) is one of the most important imaging techniques used in semiconductor failure analysis. While optical microscopes remain extremely useful for initial inspection, many semiconductor defects are simply too small to characterize adequately with visible-light microscopy. SEM uses a focused beam of electrons rather than light, allowing engineers ...

Creonic Releases DVB-S2X Demodulator Version 6.0 with Increased Bitwidth and Annex M Support

Kaiserslautern, Germany – July 31, 2025 – Creonic GmbH, the leading provider of cutting-edge communications IP cores, announces the release of Version 6.0 of its DVB-S2X Demodulator IP core. This major update introduces powerful enhancements that expand the configurability and technical performance of one of Creonic’s most mature and widely ...

Creonic Adds oFEC Codec IP Core to Portfolio, Expanding High-Speed Networking Solutions for ASIC and FPGA

Kaiserslautern, Germany – May 21, 2025 – Creonic GmbH, a leading provider of ready-to-use IP cores for ASIC and FPGA applications, announces the release of its new oFEC (Open Forward Error Correction) codec IP core. The solution supports next-generation optical and high-speed communication systems and is now available in both ...

Semiconductor Failure Analysis Services | Find an IC Failure Analysis Lab

Need semiconductor failure analysis services? AnySilicon helps semiconductor companies, fabless companies, IDMs, electronics manufacturers and engineering teams identify failure analysis laboratories with the equipment and expertise required to investigate IC, wafer, die and semiconductor package failures. A good semiconductor failure analysis lab does more than operate laboratory equipment. The laboratory must ...

Physical Failure Analysis (PFA) of Semiconductor Devices

Once an electrical failure has been localized inside an integrated circuit, the next challenge is determining what physically went wrong.  Was a metal interconnect broken?  Did a via fail?  Is there contamination between two structures? Has a dielectric layer broken down? Is a transistor structure abnormal? Or did the failure originate in the ...

FIB Circuit Edit

What is a Circuit Edit?   A circuit edit is when you need to modify an existing ASIC or integrated circuit for whatever reason. This is usually done with the help of an ion beam that is focused onto the chip to modify it as per the request of the designer. Engineers ...

PHIX Photonics Assembly

The Netherlands

Packaging foundry aiming to become world leader in the assembly of photonic ICs in scalable volumes.

OBIRCH for Semiconductor Failure Analysis: Resistive Fault Localization

OBIRCH (Optical Beam Induced Resistance Change) is a laser-based fault-localization technique used in semiconductor failure analysis to identify electrically abnormal regions such as resistive shorts, leakage paths, defective vias and interconnect problems. The technique works by scanning a focused laser across an electrically biased semiconductor device. Local laser heating changes the ...

Understanding Wafer Cost

The factors affecting silicon wafer cost are numerous. From the resistivity required for different applications to the physical size of the wafers, and not least the quality grades that separate the pristine from the less perfect; each aspect intricately influences the cost.     As we embark on this explanation, we'll unwrap the ...

NVM Express IP for Enterprise SSDs - Overview and Implementation

The NVM Express (NVMe) specification has been introduced in 2011. Five years later, it is definitely adopted as the new standard storage interface for Solid-State Drives (SSD). Even if SAS and SATA SSDs are still dominating the market (in unit shipment), the PCIe SSD market share is growing fast and ...