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NVM Express IP for Enterprise SSDs - Overview and Implementation

The NVM Express (NVMe) specification has been introduced in 2011. Five years later, it is definitely adopted as the new standard storage interface for Solid-State Drives (SSD). Even if SAS and SATA SSDs are still dominating the market (in unit shipment), the PCIe SSD market share is growing fast and ...

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RoodMicrotec

Germany

RoodMicrotec provides SCM, Test, Qualification, Failure Analysis and Engineering services to automotive, aerospace, industrial, consumer, medical markets and fabless companies.

Services

Supply Chain Management Services – Turnkey Solutions, Engineering services, test program development, Qualification & Reliability investigations, Optomechanical qualifications, Failure & Technological analysis, Device testing, device programming, end-of-line services

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Creonic Adds oFEC Codec IP Core to Portfolio, Expanding High-Speed Networking Solutions for ASIC and FPGA

Kaiserslautern, Germany – May 21, 2025 – Creonic GmbH, a leading provider of ready-to-use IP cores for ASIC and FPGA applications, announces the release of its new oFEC (Open Forward Error Correction) codec IP core. The solution supports next-generation optical and high-speed communication systems and is now available in both ...

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Comparing Au, Pt, Ag and Cu Wire Bonding

With the creeping rise in the price of gold, many microelectronics manufacturing companies have been looking for alternatives to reduce the cost of ball bonding. Recently, the trend has been to look into the use copper wire. However, there are many drawbacks to using copper wire, including the short shelf ...

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Sarcina Technology launches AI platform To enable cost-effective customizable packaging solutions for AI applications

Palo Alto, CA - 25 March 2025. Sarcina Technology, a global semiconductor packaging specialist, is excited to announce the launch of its innovative AI platform to enable advanced AI packaging solutions that can be tailored to meet specific customer requirements. Leveraging ASE’s FOCoS-CL (Fan-Out Chip-on-Substrate-Chip Last) assembly technology, this platform ...

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Faraday Delivers Latest SerDes IP to Complete Interface Lineup on UMC’s 22nm Platform

Hsinchu, Taiwan -- June 24, 2025 -- Faraday Technology Corporation (TWSE: 3035), a leading ASIC design service and IP provider, today announced the availability of its 10G SerDes IP on UMC’s 22nm process technology. Designed to meet the increasing demands of high-speed data transmission, the new SerDes IP supports a broad ...

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Introduction to Silicon-Germanium (SiGe) Technology

Overview of Silicon-Germanium (SiGe) Technology and Historical Development   Shockley's early transistor game most likely inspired the notion of fusing silicon (Si) and germanium (Ge) to create an alloy for use in transistor engineering. However, this concept has just become a reality in the last 15 years due to the challenges associated ...

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The 6 Must-Do’s for Semiconductor Fabless Start-ups

Getting funding for a semiconductor startup is not getting easier. According to CBIngishts, there have been fewer than 20 Angel/Seed and Series A deals in the USA in each year since 2009.   So where is all the funding channeled to? In 2013, close to a quarter of all VC funding was ...

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Creonic Releases DVB-S2X Demodulator Version 6.0 with Increased Bitwidth and Annex M Support

Kaiserslautern, Germany – July 31, 2025 – Creonic GmbH, the leading provider of cutting-edge communications IP cores, announces the release of Version 6.0 of its DVB-S2X Demodulator IP core. This major update introduces powerful enhancements that expand the configurability and technical performance of one of Creonic’s most mature and widely ...

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FIB Circuit Edit

What is a Circuit Edit?   A circuit edit is when you need to modify an existing ASIC or integrated circuit for whatever reason. This is usually done with the help of an ion beam that is focused onto the chip to modify it as per the request of the designer. Engineers ...

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