The richest directory of IC Layout House worldwide. Find the Chip IC Layout House that matches your needs.
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SoC Design, Supply Chain Management, ASIC Services, FPGA Design
Processor IP, Digital and Analog IP
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SiPass Silicon Platform as a Service, System in Package (SiP) Turnkey Service, ChipStarter Multi-Client ASIC Programs
Analog and Mixed Signal IP, Graphic and Peripheral IP, Interface Controller & PHY IP, Memory and Logic Library IP, Multimedia & Wireless Communication IP, Processor & Microcontroller IP
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Turnkey ASIC / SOC Development, Technology Development Platform, Technology Development Platform, Analog Circuit Design, Integrated Circuit Layout, Digital Design (RTL Design) and Verification, Digital Physical Design
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Custom IC Solutions, Design and Supply of Industrial ASICs , Design and Supply of Automotive ASICs
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Design Services, Time and Material (T&M) contracting
PRBS-71532-HS: 32Gbps Pseudo Random Bit Sequence (PRBS) Generator/Checker of 7, 15, 31 order., 32Gbps, 7/15/31 order, Pseudo Random Bit Sequence Generator, Checker, Error Counter, 32Gbps, 31 order, Pseudo Random Bit Sequence Generator, Checker, Error Counter, 32Gbps, 7/15 order, Pseudo Random Bit Sequence Generator, Checker, Error Counter
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RTL2GDS2, Functional Verification, Frontend Design, Backend Design, Embedded Systems Design
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RTL Design, RTL Design Verification, DFT, Netlist to GDS, Analog Circuit and Layout, Post Silicon Services
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Spec2parts, FPGA Prototyping & Validation, Derivative Chips, Automotive Chips, Chiplets, IP Hardening
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ASIC, SOC design, Foundry services, Turn key (supply chain management), Package and testing , TSMC’s official VCA (Value Chain Aggregator) , MPW and mini ASIC Services
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Logic Design (Front-End), ASIC Design RTL to GDS2, Analog & RF Design, Productization, Production, Additional Services
CPU & SoC, Security, General Purpose IP, Analog IP
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IP Provider for unique I/O and ESD protection, Custom I/O and ESD Design
Low Voltage ESD/EOS protection (up to 5V), HV/BCD EOS/ESD protection (5V and higher), LIN PHY (transceiver) , Programmable Clipping Circuit for Antenna pins, Radiation hard circuits, IP for chiplet Die-2-Die interfaces
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Design Services
Standard Cells Libraries, TCAM & CAM, SRAM & ROM, Custom PDK and PCELL, Register Files
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Design Execution, AMS Circuit Design, Reliability & Product Engineering, Embedded Software, Low-Cost ASIC
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Turnkey ASIC Design , Post Fabrication – Packaging & Testing, Consultation Services, Custom ROIC & ASIC Design
Column ADC Patent, Extensive IP Library
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Analog / Mixed Signal ASIC Design, Circuit Design, Back-End Services, Custom PDK and PCELL, Low Cost ASIC or ASSP, Smart Integrated Power
Analog Signal Path IP (Amplifiers, ADCs, DACs, LDOs)
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Intellectual Property (IP) & Process Technology, SoC/ASIC Development Platform, Design Flow, Packaging & Testing, Production Service, Application-Oriented Value-Added Services
USB3.1 Gen1 IP Solutions, Technology Optimized Standard Cell Library, ESD Robust Multi-Voltage I/O, Low Power SRAM with High Production Yield
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ASIC design and supply chain management, ASIC design services
Video and Graphics, Digital IP, Analog IP
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