Find here a list of IC layout companies, IC layout services, SoC layout services and ASIC layout services.
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ASIC Design , Testing and Packaging, Qualification and Failure Analysis, Supply Chain Management, IoT Operations Outsourcing Solutions, RF and Mixed-Signal Test, Front-end Tape-out, Mask and Wafer Procurement, Back-end Manufacturing and Test, GLOBALFOUNDRIES Channel Partner
RFID analog front-end
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Design Verification, Physical Design , Design for Test (DFT) , Analog & Mixed Signal (AMS) Design, Embedded & Product Engineering Services
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Design Execution, AMS Circuit Design, Reliability & Product Engineering, Embedded Software, Low-Cost ASIC
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Fabless Semicoductor Supplier, Design Services – Analog & Digital ASIC design, Design Services – FPGAs, Design Services – IC Lifecycle Management – EOL Redesign
Analog IP Cores, Digital IP Cores
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Analog / Mixed Signal ASIC Design, Circuit Design, Back-End Services, Custom PDK and PCELL, Low Cost ASIC or ASSP, Smart Integrated Power
Analog Signal Path IP (Amplifiers, ADCs, DACs, LDOs)
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ASIC Turnkey Service, Libraries Development Service, VLSI Design Service , Layout & Backend Service, IP Cores , Consultancy
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ADVANCED VERIFICATION, ASIC/FPGA/HW, EMBEDDED SYSTEMS AND SOFTWARE DESIGN, FUNCTIONAL SAFETY, TRAINING, EIC ACADEMY
TRNG IP Cores, SHA3 IP Cores, RSA Keygen IP Cores, RSA IP Cores, ECDSA IP Cores, DRBG IP Cores, AES GCM IP Cores, MIL-STD-1553-IP CORE, ARINC664 END SYSTEM IP CORE, ARINC664 SWITCH IP CORE, ARINC429 IP CORE, PRACH IP Suite
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ASIC Specifications & Design, Hi-Rel, Automotive and Industrial ASICs, Supply Chain Services
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Implementation Feasibility, ASIC Concept, ASIC Design, ASIC Manufacturing, Assembly and Test, ASIC Qualification and Failure Analysis , ASIC Logistics
Low-Noise and Low-Power Front-End Amplifiers, High-Precision Analog-to-Digital Converters, Voltage Regulators and Charge Pumps, Custom IP Solutions
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FPGA to ASIC Conversion and Replacement, Turnkey ASIC Design and Manufacturing, Legacy Microprocessor Replacement, Analog/Mixed Signal ASIC Design and Manufacturing , Defense, Medical and High Temperature Applications, Legacy FLASH Memory Replacement
Legacy Microcontroller Families, Analog Blocks, FLASH Memory, Serial Interface Modules
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IC design and services, Silicon IP design and services, ASIC design services, DPD design services, PCB design services
RF-DAC, High speed DAC and ADC, General purpose clock generator - PLL, High speed bi-directional Interface (SerDes)
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Front End Design, Design Verification, Physical Design & Sign Off, Design for Testability (DFT), FPGA Design, Analog Design
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IC Design Services, Data converters, Power & Power management, High performance analog, Digital control, Lab validation
SARADC – 37.5 MS/s 12 bit SAR ADC, SARADC – 2MS/s 14 bit SAR ADC w/o Calibration, LLSDADC – High Resolution Low Latency ΣΔ ADC, SDCRDAC – 24 bit Sigma-Delta DAC, CRDAC – 12 bit charge-redistribution DAC, FIRDAC – High Accuracy Low OOBN ΣΔ DAC
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Turnkey ASIC / SOC Development, Technology Development Platform, Technology Development Platform, Analog Circuit Design, Integrated Circuit Layout, Digital Design (RTL Design) and Verification, Digital Physical Design
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RTL Design and Verification, Design Verification, Design For Test, Physical Design, Static Timing Analysis, Post Silicon Validation
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IP Licensing, Mixed-Signal ASIC Design and Customization
HomePlug Green PHY Powerline Communication (HPGP PLC) for Electric Vehicle (EV) Charging System and Automotive, ZigBee Wireless at 2.4GHz, Sub-Gigahz RF Transceiver (programmable 400MHz – 1GHz)
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ASIC and SOC design, Silicon IP licensing, Ultra low-power 2.4 GHz transceiver for Bluetooth Smart & IoT, Ultra low-power icyflex® processors
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ASIC/FPGA Design Services, Analog & Mixed Signal Design, Custom Layout, Digital Design Services, Foundry Services, Post Silicon Validation Services, SoC Turnkey Design
IP Marketplace
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Turnkey ASIC Programs, ASIC Architecture & Front‑End Design, Physical Design & IC Layout, Verification, DFT & Sign‑Off, Manufacturing, Test & Qualification Management, Program & Supply‑Chain Integration
Third‑Party IP Integration & Enablement, Interface IP & Subsystem Integration (Controller + PHY Enablement)
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