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Physical Failure Analysis (PFA) of Semiconductor Devices

Once an electrical failure has been localized inside an integrated circuit, the next challenge is determining what physically went wrong.  Was a metal interconnect broken?  Did a via fail?  Is there contamination between two structures? Has a dielectric layer broken down? Is a transistor structure abnormal? Or did the failure originate in the ...

Transmission Electron Microscopy (TEM) for Semiconductor Failure Analysis

Transmission Electron Microscopy (TEM) is one of the highest-resolution physical-analysis techniques used in semiconductor failure analysis. It allows failure analysts to examine extremely small structural and material anomalies that may be impossible to characterize using optical microscopy or conventional SEM alone. TEM works by transmitting a high-energy electron beam through an ...

Xscape Photonics Secures $44 Million in Series A Funding to Revolutionize Data Center Connectivity

October 15, 2024 – Xscape Photonics, a pioneer in next-generation data center connectivity, today announced the closing of a $44 million Series A funding round, bringing its total funding to $57 million. The round was led by IAG Capital Partners and included participation from Cisco Systems Inc., Nvidia Corp., Altair ...

NVM Express IP for Enterprise SSDs - Overview and Implementation

The NVM Express (NVMe) specification has been introduced in 2011. Five years later, it is definitely adopted as the new standard storage interface for Solid-State Drives (SSD). Even if SAS and SATA SSDs are still dominating the market (in unit shipment), the PCIe SSD market share is growing fast and ...

Gallium Arsenide (GaAs) Overview

Gallium arsenide (GaAs) technology is a type of semiconductor material used in the manufacturing of various electronic devices. It is known for its high electron mobility, which allows it to operate at higher speeds and with lower power consumption compared to other semiconductor materials such as silicon. GaAs technology is ...

Comparing Au, Pt, Ag and Cu Wire Bonding

With the creeping rise in the price of gold, many microelectronics manufacturing companies have been looking for alternatives to reduce the cost of ball bonding. Recently, the trend has been to look into the use copper wire. However, there are many drawbacks to using copper wire, including the short shelf ...

X-Ray Inspection for Semiconductor Package Failure Analysis

Many important semiconductor package defects are completely hidden from optical inspection. A solder ball can contain a void. A bond wire can be broken inside an encapsulated package. A die-attach layer may contain large areas of voiding. A package substrate can contain an open trace, and an advanced package may have ...

RoodMicrotec

Germany

RoodMicrotec provides SCM, Test, Qualification, Failure Analysis and Engineering services to automotive, aerospace, industrial, consumer, medical markets and fabless companies.

Sarcina Technology launches AI platform To enable cost-effective customizable packaging solutions for AI applications

Palo Alto, CA - 25 March 2025. Sarcina Technology, a global semiconductor packaging specialist, is excited to announce the launch of its innovative AI platform to enable advanced AI packaging solutions that can be tailored to meet specific customer requirements. Leveraging ASE’s FOCoS-CL (Fan-Out Chip-on-Substrate-Chip Last) assembly technology, this platform ...

Understanding Wafer Cost

The factors affecting silicon wafer cost are numerous. From the resistivity required for different applications to the physical size of the wafers, and not least the quality grades that separate the pristine from the less perfect; each aspect intricately influences the cost.     As we embark on this explanation, we'll unwrap the ...