The richest directory of IC Design House worldwide. Find the IC Design House that matches your needs.
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RTL Logic Design, Functional Verification, Place and Route / Layout, Architecture Design, FPGA Prototyping and Emulation, Leadership and Consulting: Technology Selection, Methodology, Planning, Audits
Custom IP Core or VIP Development
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GDS Hand-off Wafer Production, Spec-in services, Front-end & Back-end Design, Foundry Manufacturing, Packaging, Test & Reliability
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Turnkey ASIC / SOC Development, Technology Development Platform, Technology Development Platform, Analog Circuit Design, Integrated Circuit Layout, Digital Design (RTL Design) and Verification, Digital Physical Design
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Intellectual Property (IP) & Process Technology, SoC/ASIC Development Platform, Design Flow, Packaging & Testing, Production Service, Application-Oriented Value-Added Services
USB3.1 Gen1 IP Solutions, Technology Optimized Standard Cell Library, ESD Robust Multi-Voltage I/O, Low Power SRAM with High Production Yield
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Integrated Circuit (IC) Design, Full Turn-Key ASIC Supplier, Fabless Manufacturing
Logic Families, Analog
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Custom RTL Design, Pre-Verified IP Cores, Verification & Validation
DDR & LPDDR Memory Controller IP, PCIe Controller IP, Ethernet MAC & PHY IP, AI/ML Compute Unit IP
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Custom Silicon, Design Verification, Physical Design , Design for Test (DFT) , Analog & Mixed Signal (AMS) Design, Embedded & Product Engineering Services
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SiPass Silicon Platform as a Service, System in Package (SiP) Turnkey Service, ChipStarter Multi-Client ASIC Programs
Analog and Mixed Signal IP, Graphic and Peripheral IP, Interface Controller & PHY IP, Memory and Logic Library IP, Multimedia & Wireless Communication IP, Processor & Microcontroller IP
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Design Services, Foundry Access, Custom IP, Turnkey Solution, makeChip Hosted Design Service Platform
0.4V Standard Cell Library for 22FDX (22nm FDSOI), Adaptive Body Bias Solution for 22FDX (22nm FDSOI)
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Custom ASIC Design, ASIC Design Services, Silicon IP Licensing and Design, Supply Chain Services (Turnkey), Product Design (Hardware & Software), Antenna Design
RF & PLL, Analog – PLL, Analog - ADC, Analog – Interface, Analog – Misc, Power, Digital
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SystematIC- Custom ASIC Design, Turnkey (Supply chain Services), Sensor Interfacing, Integrated Power, High Voltage Expertise
Analog IP
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Front End Design, Design Verification, Physical Design & Sign Off, Design for Testability (DFT), FPGA Design, Analog Design
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ADVANCED VERIFICATION, ASIC/FPGA/HW, EMBEDDED SYSTEMS AND SOFTWARE DESIGN, FUNCTIONAL SAFETY, TRAINING, EIC ACADEMY
MIL-STD-1553-IP CORE, ARINC664 END SYSTEM IP CORE, ARINC429 IP CORE, PRACH IP Suite
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Turnkey ASIC Design, Turnkey ASIC Supply, High-Voltage Design, Sensors & MEMS Expertise, Ultra-Low Power Design, Precision Analog & Data Converter Design
Data Converters, RF Circuits, Analog Amplifiers and Comparators, High Voltage Drivers/Interfacing, Serial Communications, Power Management and References
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IP Licensing, Mixed-Signal ASIC Design and Customization
HomePlug Green PHY Powerline Communication (HPGP PLC) for Electric Vehicle (EV) Charging System and Automotive, ZigBee Wireless at 2.4GHz, Sub-Gigahz RF Transceiver (programmable 400MHz – 1GHz)
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ASIC Specifications & Design, Hi-Rel, Automotive and Industrial ASICs, Supply Chain Services
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Design Services, Time and Material (T&M) contracting
PRBS-71532-HS: 32Gbps Pseudo Random Bit Sequence (PRBS) Generator/Checker of 7, 15, 31 order., 32Gbps, 7/15/31 order, Pseudo Random Bit Sequence Generator, Checker, Error Counter, 32Gbps, 31 order, Pseudo Random Bit Sequence Generator, Checker, Error Counter, 32Gbps, 7/15 order, Pseudo Random Bit Sequence Generator, Checker, Error Counter
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ASIC design and supply chain management, ASIC design services
Video and Graphics, Digital IP, Analog IP
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Custom IC Solutions, Design and Supply of Industrial ASICs , Design and Supply of Automotive ASICs
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Turnkey ASIC Programs, ASIC Architecture & Front‑End Design, Physical Design & IC Layout, Verification, DFT & Sign‑Off, Manufacturing, Test & Qualification Management, Program & Supply‑Chain Integration
Third‑Party IP Integration & Enablement, Interface IP & Subsystem Integration (Controller + PHY Enablement)
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