The richest directory of IC Design House worldwide. Find the IC Design House that matches your needs.
113 results found See AllSend Email to All
Mixed-Signal ASIC Designs Portfolio, ASIC Design, ASIC Testing, Products, Comport Data, Comport Data Contact Form
View vendor page
Turnkey ASIC / SOC Development, Technology Development Platform, Technology Development Platform, Analog Circuit Design, Integrated Circuit Layout, Digital Design (RTL Design) and Verification, Digital Physical Design
View vendor page
Turnkey ASIC Design, IP Blocks Design, Radioelectronic Devices Development
RF Transceivers, PLL, ADC, Process, Voltage and Temperature Sensors (PVT sensor/detector/controller), RFID (UHF tag, ID card, NFC, medical implants), Energy harvesting (power converters from RF-field to voltage and current)
View vendor page
FPGA Design Services, ASIC Design Services, HW Design Services, Embedded/FW Design Services, Camera and Video Design Services, Machine Vision Custom Services
MIPI-CSI2, VoSPI Rx for FLIR Lepton IR-sensors, 1G UDP Ethernet IP
View vendor page
Design Services, Time and Material (T&M) contracting
PRBS-71532-HS: 32Gbps Pseudo Random Bit Sequence (PRBS) Generator/Checker of 7, 15, 31 order., 32Gbps, 7/15/31 order, Pseudo Random Bit Sequence Generator, Checker, Error Counter, 32Gbps, 31 order, Pseudo Random Bit Sequence Generator, Checker, Error Counter, 32Gbps, 7/15 order, Pseudo Random Bit Sequence Generator, Checker, Error Counter
View vendor page
Design Services
Standard Cells Libraries, TCAM & CAM, SRAM & ROM, Custom PDK and PCELL, Register Files
View vendor page
Partnership Programs, Standard Chiplet Design, Custom SoC and IP Design & Licensing, Comprehensive Design Services, Consulting
View vendor page
ASIC Design, Analog / Mixed Signal ASIC Design, RF ASIC & IP Design, Turn-Key Design & Supply Chain Management, IP Development / Verification / Characterization
Pipeline ADC, SAR ADC, RFID Building Blocks, Voltage Regulator
View vendor page
LVR – DRC, LVS and ERC Physical Verification, Foundry Rule Decks and LRF (Layout Rule Format), LVR Debug, Waivers and Custom-Layout Integration, PRE – Place and Route Engine, LVR for AI Agents – MCP Server and Per-Run Licensing, Training – Physical Design with PRE and LVR
View vendor page
Turnkey ASIC Programs, ASIC Architecture & Front‑End Design, Physical Design & IC Layout, Verification, DFT & Sign‑Off, Manufacturing, Test & Qualification Management, Program & Supply‑Chain Integration
Third‑Party IP Integration & Enablement, Interface IP & Subsystem Integration (Controller + PHY Enablement)
View vendor page
Analog & Mixed Signal IC Design Services – Sample Capabilities, Design & Layout Tools, RF ASIC Design & Wireless Integrated Circuits, RF ASIC Design Tools, Analog Semi-Custom Arrays (700 Series), Analog Semi-Custom Arrays (Data Archive)
View vendor page
AI Circuit Design, Analog & Mixed Signal Design, Emerging Memory Development, Special Purpose Applications, Interface Solutions
View vendor page
ASIC Turnkey Service / ASIC Prototyping Service, IC Design Services, Power Semiconductor Turnkey Service
View vendor page
Custom ASIC Design, ASIC Design Services, Silicon IP Licensing and Design, Supply Chain Services (Turnkey), Product Design (Hardware & Software), Antenna Design
RF & PLL, Analog – PLL, Analog - ADC, Analog – Interface, Analog – Misc, Power, Digital
View vendor page
SiPass Silicon Platform as a Service, System in Package (SiP) Turnkey Service, ChipStarter Multi-Client ASIC Programs
Analog and Mixed Signal IP, Graphic and Peripheral IP, Interface Controller & PHY IP, Memory and Logic Library IP, Multimedia & Wireless Communication IP, Processor & Microcontroller IP
View vendor page
RTL Design and Verification, Design Verification, Design For Test, Physical Design, Static Timing Analysis, Post Silicon Validation
View vendor page
Custom Silicon, Design Verification, Physical Design , Design for Test (DFT) , Analog & Mixed Signal (AMS) Design, Embedded & Product Engineering Services
View vendor page
Intellectual Property (IP) & Process Technology, SoC/ASIC Development Platform, Design Flow, Packaging & Testing, Production Service, Application-Oriented Value-Added Services
USB3.1 Gen1 IP Solutions, Technology Optimized Standard Cell Library, ESD Robust Multi-Voltage I/O, Low Power SRAM with High Production Yield
View vendor page
Logic Design (Front-End), ASIC Design RTL to GDS2, Analog & RF Design, Productization, Production, Additional Services
CPU & SoC, Security, General Purpose IP, Analog IP
View vendor page
IP Customization—System Design—Consulting
Forward Error Correction, Voice & Data Compression, Security, Telecom DSP, Communication Protocols & Networking, Baseband PHYs
View vendor page