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Germany
RoodMicrotec provides SCM, Test, Qualification, Failure Analysis and Engineering services to automotive, aerospace, industrial, consumer, medical markets and fabless companies.
Supply Chain Management Services – Turnkey Solutions, Engineering services, test program development, Qualification & Reliability investigations, Optomechanical qualifications, Failure & Technological analysis, Device testing, device programming, end-of-line services
View vendor pagePalo Alto, CA - 25 March 2025. Sarcina Technology, a global semiconductor packaging specialist, is excited to announce the launch of its innovative AI platform to enable advanced AI packaging solutions that can be tailored to meet specific customer requirements. Leveraging ASE’s FOCoS-CL (Fan-Out Chip-on-Substrate-Chip Last) assembly technology, this platform ...
Dr. Morris Chang is not my hero. He might be the most important person in the semiconductor industry in our lifetime, but he is not my hero. I have nothing against him. I’ve never met him and probably will never will. Instead, I meet my heroes usually after tape-out, when ...
Many important semiconductor package defects are completely hidden from optical inspection. A solder ball can contain a void. A bond wire can be broken inside an encapsulated package. A die-attach layer may contain large areas of voiding. A package substrate can contain an open trace, and an advanced package may have ...
When an integrated circuit fails, identifying the damaged component is only part of the challenge. Engineers must determine where the failure occurred, what physical or electrical mechanism caused it, and ultimately why it happened. This requires a combination of specialized IC failure analysis techniques. Some techniques detect electrical abnormalities without physically altering ...
Overview of Silicon-Germanium (SiGe) Technology and Historical Development Shockley's early transistor game most likely inspired the notion of fusing silicon (Si) and germanium (Ge) to create an alloy for use in transistor engineering. However, this concept has just become a reality in the last 15 years due to the challenges associated ...
Package failure analysis is the systematic investigation of defects and failures originating within semiconductor packaging, interconnects, solder connections, die attach, bond wires, redistribution layers and other structures that connect the semiconductor die to the outside system. A semiconductor device may fail electrical testing even though the silicon itself is functioning correctly. ...
Many semiconductor failure-analysis techniques require direct access to structures that are hidden inside an IC package. The semiconductor die, bond pads, bond wires and other critical components may be completely covered by epoxy molding compound or other packaging materials. Before these structures can be examined using techniques such as optical microscopy, emission ...
UK
Seamlessly Bridging the Analogue and Digital Worlds for Tomorrow's Chiplet Solutions.
Partnership Programs, Standard Chiplet Design, Custom SoC and IP Design & Licensing, Comprehensive Design Services, Consulting
View vendor pageThe Chinese Ministry of Commerce today announced immediate export restrictions on gallium, germanium, antimony, and super-hard materials to the United States. This action cites national security concerns and represents a significant escalation of trade tensions between the two countries. The restrictions follow recent U.S. actions to curb exports of semiconductor-related ...
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