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Creonic Adds oFEC Codec IP Core to Portfolio, Expanding High-Speed Networking Solutions for ASIC and FPGA

Kaiserslautern, Germany – May 21, 2025 – Creonic GmbH, a leading provider of ready-to-use IP cores for ASIC and FPGA applications, announces the release of its new oFEC (Open Forward Error Correction) codec IP core. The solution supports next-generation optical and high-speed communication systems and is now available in both ...

Introduction to Silicon-Germanium (SiGe) Technology

Overview of Silicon-Germanium (SiGe) Technology and Historical Development   Shockley's early transistor game most likely inspired the notion of fusing silicon (Si) and germanium (Ge) to create an alloy for use in transistor engineering. However, this concept has just become a reality in the last 15 years due to the challenges associated ...

NVM Express IP for Enterprise SSDs - Overview and Implementation

The NVM Express (NVMe) specification has been introduced in 2011. Five years later, it is definitely adopted as the new standard storage interface for Solid-State Drives (SSD). Even if SAS and SATA SSDs are still dominating the market (in unit shipment), the PCIe SSD market share is growing fast and ...

Faraday Unveils ASIC Success in Factory Automation

Faraday Technology Corporation (TWSE: 3035), a leading ASIC design service and IP provider, today announced that it has won and delivered several factory automation (FA) related ASIC projects, supporting real-time Ethernet, EtherCAT, Profibus, and PLC controllers. In each case, Faraday employs its value-added ASIC and IP customization service for power-performance ...

The 6 Must-Do’s for Semiconductor Fabless Start-ups

Getting funding for a semiconductor startup is not getting easier. According to CBIngishts, there have been fewer than 20 Angel/Seed and Series A deals in the USA in each year since 2009.   So where is all the funding channeled to? In 2013, close to a quarter of all VC funding was ...

Analogue Insight

UK

Seamlessly Bridging the Analogue and Digital Worlds for Tomorrow's Chiplet Solutions.

Understanding Wafer Cost

The factors affecting silicon wafer cost are numerous. From the resistivity required for different applications to the physical size of the wafers, and not least the quality grades that separate the pristine from the less perfect; each aspect intricately influences the cost.     As we embark on this explanation, we'll unwrap the ...

INTEGRA TECHNOLOGIES EXPANDS SILICON PHOTONICS CAPABILITIES

Silicon Valley, CA (Feb 9, 2021) - Integra Technologies, a world leader in semiconductor packaging, assembly, test, characterization and related services, today announced the successful implementation of a high accuracy fiber array waveguide attachment system focused on the Silicon Photonics market. This latest set of tools is based on the double-sided HexNano ...

Qmode project with QuiX

The Qmode project is funded with an MIT-R&D collaboration project grant from the Provincie Overijssel, dedicated to stimulate the innovation and development of products, processes and services of local SMEs working in the Dutch Top Sectors. The collaboration established in Qmode will help QuiX secure a leading position in the ...

BCD, CMOS, FinFET, SOI, GaN & SiC Technologies Explained

Introduction to Semiconductor Semiconductors have a small energy gap between the conduction and valance bands, and their conductivity is between insulators and conductors. At absolute zero temperature, semiconductor materials are pure insulators and gradually increase with temperature. Temperature and doping are the two mechanisms to manage the conductivity of semiconductors. Doping ...