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Germany
Creonic is the leader in ready-for-use IP cores, offering a rich product portfolio for wired, wireless, fiber and free-space optical communications.
IP Customization, Low power, small footprint Design Methodology, Integration Services on Customer FPGA Boards, System Design, Consulting
IEEE 802 Data Center and Wireless FEC , OpenZR+/ Open ROADM oFEC 800GbE, SDA, ITU High-Speed Optical Communication IP Cores, Full ETSI DVB-S2X Wideband Transmitter and Receiver, AWGN Channel, 3GPP Mobile Communications
View vendor pageWhen an integrated circuit fails, one of the first questions is: How is the device failing electrically? A chip may exhibit excessive leakage current, a short circuit, an open connection, abnormal supply current, a parametric shift or a complete functional failure. Before engineers physically cut into the device, they usually want to ...
Faraday Technology Corporation (TWSE: 3035), a leading ASIC design service and IP provider, today announced that it has won and delivered several factory automation (FA) related ASIC projects, supporting real-time Ethernet, EtherCAT, Profibus, and PLC controllers. In each case, Faraday employs its value-added ASIC and IP customization service for power-performance ...
Scanning Acoustic Microscopy (SAM) is a non-destructive imaging technique widely used in semiconductor failure analysis to inspect structures and interfaces hidden inside IC packages. Unlike optical microscopy, which relies on visible light, or X-ray inspection, which relies primarily on differences in material density and X-ray absorption, SAM uses high-frequency acoustic waves. This ...
Once an electrical failure has been localized inside an integrated circuit, the next challenge is determining what physically went wrong. Was a metal interconnect broken? Did a via fail? Is there contamination between two structures? Has a dielectric layer broken down? Is a transistor structure abnormal? Or did the failure originate in the ...
Finding the right semiconductor failure analysis lab often depends less on the laboratory's name and more on whether it has the equipment and technical expertise required for your specific failure. A package delamination problem may require Scanning Acoustic Microscopy. A suspected interconnect defect may require FIB cross-sectioning and SEM inspection. Leakage ...
OBIRCH (Optical Beam Induced Resistance Change) is a laser-based fault-localization technique used in semiconductor failure analysis to identify electrically abnormal regions such as resistive shorts, leakage paths, defective vias and interconnect problems. The technique works by scanning a focused laser across an electrically biased semiconductor device. Local laser heating changes the ...
Many semiconductor failure-analysis techniques require direct access to structures that are hidden inside an IC package. The semiconductor die, bond pads, bond wires and other critical components may be completely covered by epoxy molding compound or other packaging materials. Before these structures can be examined using techniques such as optical microscopy, emission ...
The Qmode project is funded with an MIT-R&D collaboration project grant from the Provincie Overijssel, dedicated to stimulate the innovation and development of products, processes and services of local SMEs working in the Dutch Top Sectors. The collaboration established in Qmode will help QuiX secure a leading position in the ...
Kaiserslautern, Germany – July 31, 2025 – Creonic GmbH, the leading provider of cutting-edge communications IP cores, announces the release of Version 6.0 of its DVB-S2X Demodulator IP core. This major update introduces powerful enhancements that expand the configurability and technical performance of one of Creonic’s most mature and widely ...
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