Many important semiconductor package defects are completely hidden from optical inspection. A solder ball can contain a void. A bond wire can be broken inside an encapsulated package. A die-attach layer may contain large areas of voiding. A package substrate can contain an open trace, and an advanced package may have ...
Overview of Silicon-Germanium (SiGe) Technology and Historical Development
Shockley's early transistor game most likely inspired the notion of fusing silicon (Si) and germanium (Ge) to create an alloy for use in transistor engineering. However, this concept has just become a reality in the last 15 years due to the challenges associated ...
Focused Ion Beam (FIB) technology is one of the most versatile tools used in semiconductor failure analysis and microelectronics characterization. A FIB system directs a tightly focused beam of ions onto a sample. By controlling the beam current, energy, position and scanning pattern, engineers can remove material from extremely specific locations, ...
Palo Alto, CA - 25 March 2025. Sarcina Technology, a global semiconductor packaging specialist, is excited to announce the launch of its innovative AI platform to enable advanced AI packaging solutions that can be tailored to meet specific customer requirements. Leveraging ASE’s FOCoS-CL (Fan-Out Chip-on-Substrate-Chip Last) assembly technology, this platform ...
Getting funding for a semiconductor startup is not getting easier. According to CBIngishts, there have been fewer than 20 Angel/Seed and Series A deals in the USA in each year since 2009.
So where is all the funding channeled to? In 2013, close to a quarter of all VC funding was ...
Hsinchu, Taiwan -- June 24, 2025 -- Faraday Technology Corporation (TWSE: 3035), a leading ASIC design service and IP provider, today announced the availability of its 10G SerDes IP on UMC’s 22nm process technology. Designed to meet the increasing demands of high-speed data transmission, the new SerDes IP supports a broad ...
When an integrated circuit fails, identifying the damaged component is only part of the challenge. Engineers must determine where the failure occurred, what physical or electrical mechanism caused it, and ultimately why it happened. This requires a combination of specialized IC failure analysis techniques. Some techniques detect electrical abnormalities without physically altering ...
The NVM Express (NVMe) specification has been introduced in 2011. Five years later, it is definitely adopted as the new standard storage interface for Solid-State Drives (SSD). Even if SAS and SATA SSDs are still dominating the market (in unit shipment), the PCIe SSD market share is growing fast and ...
OBIRCH (Optical Beam Induced Resistance Change) is a laser-based fault-localization technique used in semiconductor failure analysis to identify electrically abnormal regions such as resistive shorts, leakage paths, defective vias and interconnect problems.
The technique works by scanning a focused laser across an electrically biased semiconductor device. Local laser heating changes the ...
Dr. Morris Chang is not my hero. He might be the most important person in the semiconductor industry in our lifetime, but he is not my hero. I have nothing against him. I’ve never met him and probably will never will. Instead, I meet my heroes usually after tape-out, when ...
