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Creonic’s DVB-S2 and DVB-S2X IP cores now include support for the new DVB-NIP standard on physical layer — an important step toward seamless integration of satellite and IP-based network technologies. The DVB-NIP standard is designed to facilitate the native transport of IP over satellite networks, extending the capabilities of DVB-S2X by streamlining packet-based data delivery. With ...
One of the leading manufacturers of automatic test equipment, Advantest has proven to be one of the leading lights in the semiconductor industry. In addition, they manufacture measuring instruments that are used in the creation of electronic system. You can find Advantest products used in the creation of digital consumer ...
Germany
RoodMicrotec provides SCM, Test, Qualification, Failure Analysis and Engineering services to automotive, aerospace, industrial, consumer, medical markets and fabless companies.
Supply Chain Management Services – Turnkey Solutions, Engineering services, test program development, Qualification & Reliability investigations, Optomechanical qualifications, Failure & Technological analysis, Device testing, device programming, end-of-line services
View vendor pageThe Netherlands
Packaging foundry aiming to become world leader in the assembly of photonic ICs in scalable volumes.
PIC Packaging and Assembly, Photonics Contract Manufacturing, Fiber Arrays Available From Stock, Engineering Support for PIC-based Modules
View vendor pageKaiserslautern, Germany – May 21, 2025 – Creonic GmbH, a leading provider of ready-to-use IP cores for ASIC and FPGA applications, announces the release of its new oFEC (Open Forward Error Correction) codec IP core. The solution supports next-generation optical and high-speed communication systems and is now available in both ...
Scanning Electron Microscopy (SEM) is one of the most important imaging techniques used in semiconductor failure analysis. While optical microscopes remain extremely useful for initial inspection, many semiconductor defects are simply too small to characterize adequately with visible-light microscopy. SEM uses a focused beam of electrons rather than light, allowing engineers ...
When an integrated circuit fails, one of the first questions is: How is the device failing electrically? A chip may exhibit excessive leakage current, a short circuit, an open connection, abnormal supply current, a parametric shift or a complete functional failure. Before engineers physically cut into the device, they usually want to ...
OBIRCH (Optical Beam Induced Resistance Change) is a laser-based fault-localization technique used in semiconductor failure analysis to identify electrically abnormal regions such as resistive shorts, leakage paths, defective vias and interconnect problems. The technique works by scanning a focused laser across an electrically biased semiconductor device. Local laser heating changes the ...
Once an electrical failure has been localized inside an integrated circuit, the next challenge is determining what physically went wrong. Was a metal interconnect broken? Did a via fail? Is there contamination between two structures? Has a dielectric layer broken down? Is a transistor structure abnormal? Or did the failure originate in the ...
What is a Circuit Edit? A circuit edit is when you need to modify an existing ASIC or integrated circuit for whatever reason. This is usually done with the help of an ion beam that is focused onto the chip to modify it as per the request of the designer. Engineers ...
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