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Package Failure Analysis Services | IC Package FA Lab

Package failure analysis is the systematic investigation of defects and failures originating within semiconductor packaging, interconnects, solder connections, die attach, bond wires, redistribution layers and other structures that connect the semiconductor die to the outside system. A semiconductor device may fail electrical testing even though the silicon itself is functioning correctly. ...

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Scanning Acoustic Microscopy (SAM) for Semiconductor Failure Analysis

Scanning Acoustic Microscopy (SAM) is a non-destructive imaging technique widely used in semiconductor failure analysis to inspect structures and interfaces hidden inside IC packages. Unlike optical microscopy, which relies on visible light, or X-ray inspection, which relies primarily on differences in material density and X-ray absorption, SAM uses high-frequency acoustic waves. This ...

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Creonic’s DVB-S2 and DVB-S2X IP Cores Now Support the New DVB-NIP Standard

Creonic’s DVB-S2 and DVB-S2X IP cores now include support for the new DVB-NIP standard on physical layer — an important step toward seamless integration of satellite and IP-based network technologies.   The DVB-NIP standard is designed to facilitate the native transport of IP over satellite networks, extending the capabilities of DVB-S2X by streamlining packet-based data delivery.  With ...

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Understanding Wafer Cost

The factors affecting silicon wafer cost are numerous. From the resistivity required for different applications to the physical size of the wafers, and not least the quality grades that separate the pristine from the less perfect; each aspect intricately influences the cost.     As we embark on this explanation, we'll unwrap the ...

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X-Ray Inspection for Semiconductor Package Failure Analysis

Many important semiconductor package defects are completely hidden from optical inspection. A solder ball can contain a void. A bond wire can be broken inside an encapsulated package. A die-attach layer may contain large areas of voiding. A package substrate can contain an open trace, and an advanced package may have ...

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Why Dr. Morris Chang is not My Hero. A tribute to Failure Analysis Engineers

  Dr. Morris Chang is not my hero. He might be the most important person in the semiconductor industry in our lifetime, but he is not my hero. I have nothing against him. I’ve never met him and probably will never will. Instead, I meet my heroes usually after tape-out, when ...

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BCD, CMOS, FinFET, SOI, GaN & SiC Technologies Explained

Introduction to Semiconductor Semiconductors have a small energy gap between the conduction and valance bands, and their conductivity is between insulators and conductors. At absolute zero temperature, semiconductor materials are pure insulators and gradually increase with temperature. Temperature and doping are the two mechanisms to manage the conductivity of semiconductors. Doping ...

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ficonTEC and PHIX partner to enable high-volume manufacturing of multi-chip photonic modules

PHIX B.V. of Enschede, The Netherlands, is a Dutch packaging foundry that assembles their customers’ photonic integrated circuits into complete modules. As these modules evolve from initial prototypes into mature products, the manufacturing volumes become much larger and a higher level of automation is required. This aspect of photonic device ...

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IC Decapsulation: Methods, Process and Applications

Many semiconductor failure-analysis techniques require direct access to structures that are hidden inside an IC package. The semiconductor die, bond pads, bond wires and other critical components may be completely covered by epoxy molding compound or other packaging materials. Before these structures can be examined using techniques such as optical microscopy, emission ...

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Electrical Failure Analysis (EFA) of Integrated Circuits

When an integrated circuit fails, one of the first questions is: How is the device failing electrically?   A chip may exhibit excessive leakage current, a short circuit, an open connection, abnormal supply current, a parametric shift or a complete functional failure. Before engineers physically cut into the device, they usually want to ...

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