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ASIC Design: From Spec to Chips

An Application Specific Integrated Circuit (ASIC) is a specialized integrated circuit crafted for a particular use or purpose. Typically, ASICs are tailored for products targeted for mass production, consolidating necessary electronics onto a single chip.     ASIC stands for “Application Specific Integrated Circuit.”   Despite the substantial initial design cost (known as NRE - ...

IC Package Types and How to Choose One?

Introduction to Integrated Circuit Packaging   Integrated circuit packaging technologies have evolved throughout the years to the point where hundreds of IC package types are available today.    Most applications will require the more general, single-element packaging for integrated circuits and the other components such as resistors, capacitators, antenna etc. However, as the semiconductor ...

M Specialties

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M&M Specialties offers Engineering, Design, Manufacturing and Assembly services for semiconductor specific Test Boards and Test Sockets

FormFactor Named #1 Global Supplier in Test Subsystems and Focused Chip Making Equipment

LIVERMORE, Calif., May 27, 2025 (GLOBE NEWSWIRE) – FormFactor, Inc. (NASDAQ: FORM), a leading semiconductor test and measurement supplier, has been named the #1 global supplier in both the Test Subsystems and Focused Chip Making Equipment categories in TechInsights’ 2025 global semiconductor industry customer satisfaction survey. The company earned five-star ...

Verification IP : Changing landscape

For decades, EDA industry has been working out options to improve their offerings and ensure silicon success for the semiconductor industry. A few decades back, while the EDA giants were unknown, design automation was exercised individually in every organization developing a product. Gradually these tools moved out of the design ...

ATS Engineering and ChipTest Announce Strategic Collaboration for Test Program Development for Advantest’s customers

Tel Aviv, Israel – March 24, 2022 - ATS Engineering, a leading Israeli test house, and ChipTest Semiconductor IC Test Company, have announced an exclusive collaboration agreement for developing test programs and test interfaces (load boards and probe cards) on the ATS’ Advantest V93000 Smart Scale platform, to support ATS ...

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Low Parasitic HBM ESD Testing

The Human Body Model (HBM) Electrostatic Discharge (ESD) test is the oldest and most widely used ESD test in the electronics industry. The JEDEC HBM test isn’t static; it has been revised to keep up with the rapid changes in the semiconductor industry. The latest revision of the spec addresses failures ...

Highest Performance Interlaken Chip-to-Chip Interface IP Core

Open-Silicon’s eighth-generation Interlaken IP supports up to 1.2Tbps high-bandwidth performance and up to 56Gbps SerDes rates with Forward Error Correction (FEC). This high-speed chip-to-chip interface IP features an architecture that is fully flexible, configurable and scalable, making it ideal for high-bandwidth networking applications, such as routers, switches, Framer/MAC, OTN switch, ...

Six ways to improve chip yield rate- before the project starts

Early on in Chip projects, yield is not taken very seriously. The common thinking goes -  anyhow there isn’t much to do as this early point of time. However, there are actually several things you can do even before the Chip design starts, which will translate to clear savings. 1- Know your ...